Rollback changes we dont need.
This commit is contained in:
parent
fdcb96971f
commit
8ff376c080
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@ -53,8 +53,8 @@ static const default_configuration default_config = {
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.filters = {
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.filters = {
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.filter = { FILTER_CONFIGURATION, sizeof(default_config.filters) },
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.filter = { FILTER_CONFIGURATION, sizeof(default_config.filters) },
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.f1 = { PEAKING, {0}, 38.5, -21.0, 1.4 },
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.f1 = { PEAKING, {0}, 38.5, -21.0, 1.4 },
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.f2 = { LOWSHELF, {0}, 60, -6.7, 0.5 },
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.f2 = { PEAKING, {0}, 60, -6.7, 0.5 },
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.f3 = { PEAKING, {0}, 105, 5.5, 0.71 },
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.f3 = { LOWSHELF, {0}, 105, 5.5, 0.71 },
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.f4 = { PEAKING, {0}, 280, -3.5, 1.1 },
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.f4 = { PEAKING, {0}, 280, -3.5, 1.1 },
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.f5 = { PEAKING, {0}, 350, -1.6, 6.0 },
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.f5 = { PEAKING, {0}, 350, -1.6, 6.0 },
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.f6 = { PEAKING, {0}, 425, 7.8, 1.3 },
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.f6 = { PEAKING, {0}, 425, 7.8, 1.3 },
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@ -68,7 +68,7 @@ static const default_configuration default_config = {
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.f14 = { PEAKING, {0}, 6200, -15.0, 3.0 },
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.f14 = { PEAKING, {0}, 6200, -15.0, 3.0 },
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.f15 = { HIGHSHELF, {0}, 12000, -6.0, 0.71 }
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.f15 = { HIGHSHELF, {0}, 12000, -6.0, 0.71 }
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},
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},
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.preprocessing = { .header = { PREPROCESSING_CONFIGURATION, sizeof(default_config.preprocessing) }, -0.16f, true, {0} }
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.preprocessing = { .header = { PREPROCESSING_CONFIGURATION, sizeof(default_config.preprocessing) }, -0.06f, true, {0} }
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};
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};
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// Grab the last 4k page of flash for our configuration strutures.
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// Grab the last 4k page of flash for our configuration strutures.
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@ -64,7 +64,7 @@ void i2s_write_init(i2s_obj_t *self) {
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self->prog_offset + self->pio_program->length - 1);
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self->prog_offset + self->pio_program->length - 1);
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pio_sm_set_config(self->pio, self->sm, &config);
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pio_sm_set_config(self->pio, self->sm, &config);
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uint32_t *rbs = malloc(sizeof(uint8_t) * RINGBUF_LEN_IN_BYTES);
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uint8_t *rbs = malloc(sizeof(uint8_t) * RINGBUF_LEN_IN_BYTES);
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ringbuf_init(&self->ring_buffer, rbs, RINGBUF_LEN_IN_BYTES);
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ringbuf_init(&self->ring_buffer, rbs, RINGBUF_LEN_IN_BYTES);
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irq_set_exclusive_handler(DMA_IRQ_1, dma_irq_write_handler);
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irq_set_exclusive_handler(DMA_IRQ_1, dma_irq_write_handler);
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@ -169,27 +169,27 @@ uint8_t *dma_get_buffer(i2s_obj_t *i2s_obj, uint channel) {
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void feed_dma(i2s_obj_t *self, uint8_t *dma_buffer_p) {
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void feed_dma(i2s_obj_t *self, uint8_t *dma_buffer_p) {
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// when data exists, copy samples from ring buffer
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// when data exists, copy samples from ring buffer
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if (ringbuf_available_data(&self->ring_buffer) >= SIZEOF_HALF_DMA_BUFFER_IN_BYTES) {
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if (ringbuf_available_data(&self->ring_buffer) >= SIZEOF_HALF_DMA_BUFFER_IN_BYTES) {
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for (uint32_t i = 0; i < SIZEOF_HALF_DMA_BUFFER_IN_BYTES; i+=4)
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for (uint32_t i = 0; i < SIZEOF_HALF_DMA_BUFFER_IN_BYTES; i++)
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ringbuf_pop(&self->ring_buffer, (uint32_t*)&dma_buffer_p[i]);
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ringbuf_pop(&self->ring_buffer, &dma_buffer_p[i]);
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} else {
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} else {
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// underflow. clear buffer to transmit "silence" on the I2S bus
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// underflow. clear buffer to transmit "silence" on the I2S bus
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memset(dma_buffer_p, 0, SIZEOF_HALF_DMA_BUFFER_IN_BYTES);
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memset(dma_buffer_p, 0, SIZEOF_HALF_DMA_BUFFER_IN_BYTES);
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}
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}
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}
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}
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uint i2s_stream_write(i2s_obj_t *self, const uint32_t *buf_out, uint size) {
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uint i2s_stream_write(i2s_obj_t *self, const uint8_t *buf_out, uint size) {
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if (size == 0) {
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if (size == 0) {
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//printf("ERROR: buffer can't be length zero");
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//printf("ERROR: buffer can't be length zero");
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exit(1);
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exit(1);
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}
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}
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uint32_t num_words_written = copy_userbuf_to_ringbuf(self, buf_out, size);
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uint32_t num_bytes_written = copy_userbuf_to_ringbuf(self, buf_out, size);
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return num_words_written;
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return num_bytes_written;
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}
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}
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// TODO maybe we can skip every fourth byte, if we're doing this in 24-bit...
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// TODO maybe we can skip every fourth byte, if we're doing this in 24-bit...
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// could save on some processing power
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// could save on some processing power
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uint32_t copy_userbuf_to_ringbuf(i2s_obj_t *self, const uint32_t *buf_out, uint size) {
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uint32_t copy_userbuf_to_ringbuf(i2s_obj_t *self, const uint8_t *buf_out, uint size) {
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uint32_t a_index = 0;
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uint32_t a_index = 0;
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while (a_index < size) {
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while (a_index < size) {
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@ -59,7 +59,7 @@ typedef struct _i2s_obj_t {
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extern i2s_obj_t i2s_write_obj;
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extern i2s_obj_t i2s_write_obj;
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void i2s_write_init(i2s_obj_t *);
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void i2s_write_init(i2s_obj_t *);
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uint i2s_stream_write(i2s_obj_t *, const uint32_t *, uint);
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uint i2s_stream_write(i2s_obj_t *, const uint8_t *, uint);
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void dma_irq_handler(uint8_t);
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void dma_irq_handler(uint8_t);
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void dma_irq_write_handler(void);
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void dma_irq_write_handler(void);
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@ -68,6 +68,6 @@ void dma_configure(i2s_obj_t *);
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uint8_t *dma_get_buffer(i2s_obj_t *, uint);
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uint8_t *dma_get_buffer(i2s_obj_t *, uint);
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void feed_dma(i2s_obj_t *, uint8_t *);
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void feed_dma(i2s_obj_t *, uint8_t *);
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uint32_t copy_userbuf_to_ringbuf(i2s_obj_t *, const uint32_t *, uint);
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uint32_t copy_userbuf_to_ringbuf(i2s_obj_t *, const uint8_t *, uint);
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#endif
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#endif
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@ -33,14 +33,14 @@
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// - Sequential atomic operations
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// - Sequential atomic operations
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// One byte of capacity is used to detect buffer empty/full
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// One byte of capacity is used to detect buffer empty/full
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void ringbuf_init(ring_buf_t *rbuf, uint32_t *buffer, size_t size) {
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void ringbuf_init(ring_buf_t *rbuf, uint8_t *buffer, size_t size) {
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rbuf->buffer = buffer;
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rbuf->buffer = buffer;
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rbuf->size = size;
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rbuf->size = size;
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rbuf->head = 0;
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rbuf->head = 0;
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rbuf->tail = 0;
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rbuf->tail = 0;
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}
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}
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bool ringbuf_push(ring_buf_t *rbuf, uint32_t data) {
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bool ringbuf_push(ring_buf_t *rbuf, uint8_t data) {
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size_t next_tail = (rbuf->tail + 1) % rbuf->size;
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size_t next_tail = (rbuf->tail + 1) % rbuf->size;
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if (next_tail != rbuf->head) {
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if (next_tail != rbuf->head) {
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@ -53,7 +53,7 @@ bool ringbuf_push(ring_buf_t *rbuf, uint32_t data) {
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return false;
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return false;
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}
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}
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bool ringbuf_pop(ring_buf_t *rbuf, uint32_t *data) {
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bool ringbuf_pop(ring_buf_t *rbuf, uint8_t *data) {
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if (rbuf->head == rbuf->tail) {
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if (rbuf->head == rbuf->tail) {
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// empty
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// empty
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return false;
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return false;
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@ -28,15 +28,15 @@
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#include "pico/stdlib.h"
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#include "pico/stdlib.h"
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typedef struct _ring_buf_t {
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typedef struct _ring_buf_t {
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uint32_t *buffer;
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uint8_t *buffer;
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size_t head;
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size_t head;
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size_t tail;
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size_t tail;
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size_t size;
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size_t size;
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} ring_buf_t;
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} ring_buf_t;
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void ringbuf_init(ring_buf_t *, uint32_t *, size_t);
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void ringbuf_init(ring_buf_t *, uint8_t *, size_t);
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bool ringbuf_push(ring_buf_t *, uint32_t );
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bool ringbuf_push(ring_buf_t *, uint8_t );
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bool ringbuf_pop(ring_buf_t *, uint32_t *);
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bool ringbuf_pop(ring_buf_t *, uint8_t *);
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bool ringbuf_is_empty(ring_buf_t *);
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bool ringbuf_is_empty(ring_buf_t *);
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bool ringbuf_is_full(ring_buf_t *);
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bool ringbuf_is_full(ring_buf_t *);
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size_t ringbuf_available_data(ring_buf_t *);
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size_t ringbuf_available_data(ring_buf_t *);
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@ -124,63 +124,90 @@ static void __no_inline_not_in_flash_func(_as_audio_packet)(struct usb_endpoint
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int32_t *out = (int32_t *) userbuf;
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int32_t *out = (int32_t *) userbuf;
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int samples = usb_buffer->data_len / 2;
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int samples = usb_buffer->data_len / 2;
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const fix3_28_t preamp = preprocessing.preamp;
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if (preprocessing.reverse_stereo) {
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for (int i = 0; i < samples; i ++) {
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for (int i = 0; i < samples; i+=2) {
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out[i] = fix16_mul(norm_fix3_28_from_s16sample(in[i]), preamp);
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out[i] = in[i+1];
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out[i+1] = in[i];
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}
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}
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}
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else {
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for (int i = 0; i < samples; i++)
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out[i] = in[i];
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}
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// Make sure core 1 is ready for us.
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multicore_fifo_pop_blocking();
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multicore_fifo_push_blocking(CORE0_READY);
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multicore_fifo_push_blocking(samples);
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for (int j = 0; j < filter_stages; j++) {
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// Left channel filter
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for (int i = 0; i < samples; i += 2) {
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fix3_28_t x_f16 = fix16_mul(norm_fix3_28_from_s16sample((int16_t) out[i]), preprocessing.preamp);
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x_f16 = bqf_transform(x_f16, &bqf_filters_left[j],
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&bqf_filters_mem_left[j]);
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out[i] = (int32_t) norm_fix3_28_to_s16sample(x_f16);
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}
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}
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// Block until core 1 has finished transforming the data
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uint32_t ready = multicore_fifo_pop_blocking();
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multicore_fifo_push_blocking(CORE0_READY);
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// Update the volume if required. We do this from core1 as
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// core0 is more heavily loaded, doing this from core0 can
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// lead to audio crackling.
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update_volume();
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// Update filters if required
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apply_config_changes();
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// keep on truckin'
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// keep on truckin'
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usb_grow_transfer(ep->current_transfer, 1);
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usb_grow_transfer(ep->current_transfer, 1);
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usb_packet_done(ep);
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usb_packet_done(ep);
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multicore_fifo_push_blocking(samples);
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if (preprocessing.reverse_stereo) {
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multicore_fifo_push_blocking((uintptr_t) (out - 1));
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out ++;
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}
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else {
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multicore_fifo_push_blocking((uintptr_t) out);
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}
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for (int i = 0; i < samples; i += 2) {
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for (int j = 0; j < filter_stages; j++) {
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out[i] = bqf_transform(out[i], &bqf_filters_left[j], &bqf_filters_mem_left[j]);
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}
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out[i] = (int32_t) norm_fix3_28_to_s16sample(out[i]);
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}
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// Signal to core 1 that we have processed our samples, so it can write to I2S
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multicore_fifo_push_blocking(CORE0_READY);
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update_volume();
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apply_config_changes();
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}
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}
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void __no_inline_not_in_flash_func(core1_entry)() {
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void __no_inline_not_in_flash_func(core1_entry)() {
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uint32_t *userbuf = (uint32_t *) multicore_fifo_pop_blocking();
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uint8_t *userbuf = (uint8_t *) multicore_fifo_pop_blocking();
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int32_t *out = (int32_t *) userbuf;
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// Signal that the thread has started
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// Signal that the thread has started
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multicore_fifo_push_blocking(CORE1_READY);
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multicore_fifo_push_blocking(CORE1_READY);
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while (true) {
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while (true) {
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const uint32_t samples = multicore_fifo_pop_blocking();
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// Signal to core 0 that we are ready to accept new data
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int32_t *out = (int32_t *) multicore_fifo_pop_blocking();
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multicore_fifo_push_blocking(CORE1_READY);
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// Block until the userbuf is filled with data
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uint32_t ready = multicore_fifo_pop_blocking();
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while (ready != CORE0_READY)
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ready = multicore_fifo_pop_blocking();
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const uint32_t samples = multicore_fifo_pop_blocking();
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for (int i = 1; i < samples; i += 2) {
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for (int j = 0; j < filter_stages; j++) {
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for (int j = 0; j < filter_stages; j++) {
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out[i] = bqf_transform(out[i], &bqf_filters_right[j], &bqf_filters_mem_right[j]);
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for (int i = 1; i < samples; i += 2) {
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fix3_28_t x_f16 = fix16_mul(norm_fix3_28_from_s16sample((int16_t) out[i]), preprocessing.preamp);
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x_f16 = bqf_transform(x_f16, &bqf_filters_right[j],
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&bqf_filters_mem_right[j]);
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out[i] = (int16_t) norm_fix3_28_to_s16sample(x_f16);
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}
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}
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out[i] = (int32_t) norm_fix3_28_to_s16sample(out[i]);
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}
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}
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// Signal to core 0 that the data has all been transformed
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multicore_fifo_push_blocking(CORE1_READY);
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// Wait for Core 0 to finish running its filtering before we apply config updates
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// Wait for Core 0 to finish running its filtering before we apply config updates
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multicore_fifo_pop_blocking();
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multicore_fifo_pop_blocking();
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i2s_stream_write(&i2s_write_obj, userbuf, samples);
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i2s_stream_write(&i2s_write_obj, userbuf, samples * 4);
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}
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}
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}
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}
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static const audio_device_config ad_conf;
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void setup() {
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void setup() {
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set_sys_clock_khz(SYSTEM_FREQ / 1000, true);
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set_sys_clock_khz(SYSTEM_FREQ / 1000, true);
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sleep_ms(100);
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sleep_ms(100);
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